Rambus is a high-throughput chip-to-chip bus system intended primarily for interfacing memory devices to a central processing unit (CPU) on a printed circuit board (PC board). Referring to FIG. 1, the main components of a typical Rambus memory system 10 are a memory controller 12, a Rambus channel 14, one or more Rambus dynamic random access memory (RDRAM) chips 16, and a termination network 18.
The memory controller is part of a chipset that interfaces a CPU chip to the rest of the computer system. The memory controller includes a Rambus interface 20 configured to operate as a master, while the RDRAM chips include Rambus interfaces 22 which operate in slave mode. The RDRAM chips in a Rambus system are packaged in Rambus Inline Memory Modules (RIMMs) which are typically connected to the Rambus channel on a PC board using plug-in connectors. The Rambus channel carries signals between the components of the system using conductors on a PC board known as xe2x80x9ctracesxe2x80x9d. A Rambus channel includes enough traces to carry 33 active signals of which 30 are high-speed Rambus Signaling Level (RSL) signals. These RSL signals typically operate at a voltage swing of about 800 mV and include the following signals: ClockToMaster (and its complement ClockToMasterN); ClockFromMaster (and its complement ClockFrom MasterN); Data bus lines DQA[8:0], DQB[8:0]; and Address and Control bus lines ROW[2:0], COL[4:0]. To increase system throughput, multiple Rambus channels may be utilized so that memory devices on both channels may be accessed simultaneously. This increases the total number of active signals that must be accommodated on the PC board.
The RSL signals in a Rambus system operate at very high speeds, so the PC board traces that carry these signals must be treated as transmission lines having a consistent characteristic impedance. A transmission line must be properly terminated to prevent reflected signals from interfering with the operation of the system. Therefore, the termination network 18 includes termination resistors that match the impedance of the RSL signal traces.
One common technique for implementing transmission lines on a printed circuit board is shown in FIG. 2 which is a cross-section of a type of PC board transmission line known as a xe2x80x9cmicrostrip.xe2x80x9d The PC board shown in FIG. 2 includes a dielectric layer 26 formed from fiberglass having a thickness xe2x80x9cHxe2x80x9d and a dielectric constant xe2x80x9cxcex5xe2x80x9d. The fiberglass layer is typically formed from fiberglass cloth that is pre-impregnated (prepreg) with resin that is cured to produce a rigid board. A layer of copper foil 28 is bonded to one side of the prepreg layer to form a reference plane 28, which in this case is a ground (GND) plane.
A signal layer is formed by applying foil-plating, and etching copper traces on the side of the prepreg layer opposite the ground plane. In the example of FIG. 2, the signal (S) trace 30 is plated to a thickness of xe2x80x9cTxe2x80x9d and formed with a trace width xe2x80x9cWxe2x80x9d. The characteristic impedance of the microstrip transmission line formed between the trace 30 and the ground plane depends primarily on the trace width xe2x80x9cWxe2x80x9d, the dielectric constant xe2x80x9cxcex5xe2x80x9d of the dielectric material, and the thickness xe2x80x9cHxe2x80x9d of the dielectric layer. Increasing the trace width reduces the impedance, whereas increasing the thickness xe2x80x9cHxe2x80x9d increases the impedance. Ground isolation traces 32 are often run parallel to the signal traces to reduce cross talk between signal traces.
Another technique for implementing transmission lines on a printed circuit board is shown in FIG. 3 which is a cross-section of a type of PC board transmission line known as a xe2x80x9cstripline.xe2x80x9d In FIG. 3, the signal layer is sandwiched between two dielectric layers 34 and 36, each having a reference plane 38 and 40, respectively, opposite the signal layer. In this example, reference plane 38 is a power plane, and reference plane 40 is a ground plane. As with a microstrip, the characteristic impedance of a stripline depends primarily on the signal trace width xe2x80x9cWxe2x80x9d, the dielectric constant xe2x80x9cxcex5xe2x80x9d of the dielectric material, and the thickness xe2x80x9cHxe2x80x9d of the dielectric layers. The signal layer of the stripline of FIG. 3 is shown with one signal trace 42, and two ground isolation traces 44.